2006년 6월 26일 월요일

흥을 깨는 사람들

제목이 좀 재미있을런지...?
이런내용의 글들은 여기저기서 단편적으로 많이들 보셨을것 같은데요...

누군가 고마우신 분께서 한곳에 모아두셔서 제가 퍼왔습니다...

지금은 당연시 여기는 여러 생각들이 발명당시에는 어찌도 이렇게 황당한 취급을 받았는지 정말 웃기기만 합니다... 기존의 고정관념과 새로운 생각사이에는 이렇게 어찌해볼 수 없을 만큼 커다란 장벽이 있는가 봅니다...

Thanks... C.W. :)



흥을 깨는 사람들

"이 전화기는 단점이 너무 많아 통신 수단으로 고려할 가치가 없을 뿐 아니라 우리에게 아무 소용도 없는 물건이다."
- 벨이 개발한 전화에 대한 웨스턴 유니온의 메모(1876년)

"발상도 흥미진진하고 구성도 좋다. 하지만 C학점이상 받으려면 실현 가능성이 있어야 한다."
- 익일 배송 서비스(Overnight delivery service)를 연구한 프레드 스미스의 논문에 대한 한 예일대학 경영학과 교수의 답변. 스미스는 후에 페덱스를 설립했다.

"재고할 가치가 없으니 우리에게 굳이 신발 제조법에 대해 이야기하지 말라."
- 대형 신발 제조 업체가 나이키 런닝 슈즈의 걸작이라고 여겨지는 '와플(Waffle)" 개발자이자 나이키의 공동 창업자인 빌 바워만에게 한 말.

"그래서 저희는 아타리(Atari) 사를 찾아가 '귀사의 일부 부품을 사용하기는 했지만 정말 멋진 제품을 개발했습니다. 저희에게 자금을 대주실 수 있습니까? 아니면 저희가 이 제품 개발 노하우를 제공할 수도 있습니다. 저희가 바라는 것은 이 제품이 세상에 나오는 것뿐입니다. 월급만 준다면 귀사를 위해 일해 보겠습니다.'라고 했지요. 그러니까 그 친구들, '그렇게는 안 된다'고 하더군요. 그래서 할 수 없이 휴렛패커드를 찾아 갔더니, '당신들은 필요 없어. 아직 대학도 졸업 못했잖아'라고 거들떠 보지도 않더라고요."
- 워즈니악(Wozniak)과 공동 개발한 PC로 아타리와 휴렛패커드의 관심을 끌어 보려고 했던 것에 대해 스티브 잡스가 한 말. 잡스와 워즈니악은 후에 공동으로 애플컴퓨터 사를 창업했다.

"'그것들을 가맹점화해야 합니다. 제가 여러분의 실험 대상이 되겠습니다.'라고 제가 간곡하게 말했지만 그들은 콧방귀도 뀌지 않았습니다! 그들에게서 경영 철학을 볼 수 없었어요. 우리의 제안을 거절하자 버드와 저는 독립했습니다."
- 샘 월트는 1962년 할인 소매 아이디어에 관심이 있어 벤 플랭클린 체인을 사려고 노력했던 때를 상기하면서 이렇게 말했다. 월튼은 후에 월마트를 창업했다.

"배우가 말하는 것을 듣고 싶어 하는 사람이 어디 있다고 그래?"
- 워너 브라더스의 워너가 최초의 유성 영화 제작을 거부하며 한말(1927년).

"음향이나 기타 치는 소리나 마음에 드는 게 하나도 없어!"
- 비틀즈 음반 취입을 거부하며, 데카 레코드(1962년).

1884년, 존 헨리 패터슨은 금전 등록기에 대한 권리를 획득하기 위해 동업하는 친구에게 6,500달러를 빌려 달라고 했다거 조롱만 당했다. 패터슨은 후에 NCR(National Cash Register, 최초의 금전 등록기 개발 회사)을 창업했다.

"의학에 컴퓨터를 이용하려 하다니 정말 정신이 나간 친구군. 나는 컴퓨터에 자신도 없고 그것으로 아무것도 하고 싶지 않소."
- 영국의 의학 교수가 CT 스캐너에 대해 존 알프레드 파웰에게 한 말.

"석유를 캔디고? 땅을 파서 석유를 캐내? 그런 엉터리 같은 생각을 하다니!"
- 채굴 경험이 풍부한 사람이 1859년 석유 시추를 하려는 에드윈 드레이크에게 한 말. 그레이크는 후에 최초의 석유 시추 개발업자가 되었다.

"비행기는 재미있는 장난감일 뿐 군사적인 가치는 전혀 없다."
- 제1차 세계대전 당시 연합군의 서부 전선 최일선에서, 페르디앙 포슈(프랑스 육군원수, 1911년).

"어두컴컴한 실내에서 지속적으로 보아야 하기 때문에 텔레비전은 결코 대중들 사이로 파고들지 못할 것이다."
- 하버드 대학교수, 체스터 도즈.

2006년 6월 23일 금요일

벌써 일년...

"브라운아이즈"의 노래 제목이 아니다...
이곳 blog를 open한지도 벌써 1년이 되었다...
처음 시작때의 마음가짐과는 달리 좀 이상해져 가는것 같아 못내 아쉽다...
아직까지는 잘 하고 있는 짓이라고 생각하며 지내고 있긴한데...
Um~~~ 글쎄~~~

2006년 6월 21일 수요일

Radiospire applies WiMAX to uncompressed HDTV

 
Radiospire applies WiMAX to uncompressed HDTV

The brewing battle for the fast home digital media network is mainly focused on Wi-Fi and the UltraWideBand technologies, with a couple of left field candidates such as 60GHz (see separate item). Another of these contenders is start-up Radiospire Networks, which is creating chips for in-home WiMAX networks optimized to stream high definition television.

Radiospire claims to retain wired image quality with its high definition multimedia interface (HDMI) chipset, which enables wireless HDTV connectivity without compressing the video signal. The technology supports 720p, 1080i and 1080p HDTV formats with industry-standard HDCP encryption. Radiospire says compression-based wireless products, such as those based on WiMedia UWB or 802.11n fast Wi-Fi, present encryption challenges that limit their ability to handle copy protected content. Throughput is up to 3Gbps for 1080p formats.

“Wireless home theater connectivity is becoming a necessity, but until now the solutions available have had major drawbacks because of the use of compression,” said Tandhoni Rao, CEO of Radiospire.

The new chipset solution consists of a SiGe RF transceiver chip, ADC/DAC, and a CMOS baseband device. It operates in the 3.1-4.8GHz range to avoid interference with Wi-Fi and other signals in 2.4GHz and 5GHz. The 720p/1080i configuration is sampling now with 1080p to follow in the second half of the year.

Another company focused on indoor applications of WiMAX is chip designer Cygnus Communications, which last year demonstrated a software defined platform for 802.16 at the SuperComm show, designed to compete with fast Wi-Fi.

In a 5GHz Lan environment, many of WiMAX’ characteristics will be similar to those of the OFDM-based variants of Wi-Fi, such as 802.11a and future releases. However, over LAN distances it will boast higher data rates than ‘a’, though not necessarily than the upcoming 802.11n, which could reach several hundred Mbps in its second generation.

The main attraction in unlicensed spectrum will be its quality of service mechanisms, which Cygnus believes are far better than those of the planned QoS extension to the 802.11 standard, called 802.11e, or the interim solution proposed by the Wi-Fi Alliance, WMM.

And then, WiMAX has the licensed spectrum options too, and so could offer a solution to spectrum holding service providers - as they start to bundle indoor media LAN facilities with other broadband offerings - that they could control.

Enhanced QoS will be important for streaming video around the home and to multiple devices such as televisions, laptops and handsets. An operator could use licensed WiMAX to deliver access and in-building LANs, by bundling a low power base station suited to indoor use with the normal WiMAX receiver.

2006년 6월 13일 화요일

Emailing: Display Resolution



   Display resolution

Wikipedia
Advertiser links
  The display resolution of a digital television or computer display is the number of pixels (or maximal image resolution) that can be displayed on the screen, usually given as a product of the number of columns (horizontal, "X") and lines (vertical, "Y"). The horizontal number is always stated first.

For analog TV sets, the horizontal resolution is related to the bandwidth of the luminance signal, and is stated in "lines", as the largest number of alternating vertical black and white stripes that can be displayed across the width of the picture without them merging together. Sometimes, the lines are counted across a width equal to the height of the picture, rather than across the full width of the picture. This gives rise to two different measures of horizontal resolution, which can lead to confusion. The vertical resolution, as with digital displays, is the number of horizontal lines in the picture.

Currently, common computer display resolutions are 640×480 (VGA, Video Graphics Array), 800×600 (SVGA, Super VGA), and 1024×768 (XGA/XVGA, eXtended). Some computer users, especially CAD users and video game players, run their computers at 1600×1200 resolution (UXGA, Ultra-eXtended) or higher if they have the necessary equipment. When a computer display resolution is set that is too high for the display, some systems make the virtual screen scrollable over the physical screen. With digital television and HDTV, vertical resolutions of 720 or 1080 scan liness are typical.

The 640×480 resolution, introduced with the IBM PS/2 VGA and MCGA (multi-color) on-board graphics chips, was the standard resolution from 1990 to 1997, partly due to its ratio. 800×600 has been the standard resolution from 1998 to the present, but 1024×768 is fast becoming the new standard resolution, especially since it also satisfies the ratio. Many web sites and multimedia products are designed for 1024×768 resolution. Most of today's computer games released during the "128-bit video game era", such as SimCity 4, do not support 640×480 at all. Windows XP is designed to run at 800×600 minimum (although it is possible to run legacy aplications in 640x480 compatibility mode).

With 15" and 17" (381 mm and 432 mm) monitors, 1024×768 resolution is the standard, whereas with 19" (483 mm) monitors, 1280×1024 is the recommended standard. Good 21" (533 mm) monitors are usually capable of 1600×1200 resolution. There are also 24" (610 mm) widescreen monitors on the market, and those will often be able to display 1900+ pixels horizontally.

Computer Standard Resolution
CGA 320×200 (16:10)
EGA 640×350 (approx. 5:3)
QVGA 320×240 (4:3)
VGA 640×480 (4:3)
SVGA 800×600 (4:3)
XGA 1024×768 (4:3)
WXGA 1280×768 (15:9)
SXGA 1280×1024 (5:4)
SXGA+ 1400×1050 (4:3)
WSXGA 1600×1024 (approx. 15.6:10)
WSXGA+ 1680×1050 (16:10)
UXGA 1600×1200 (4:3)
WUXGA 1920×1200 (16:10)
QXGA 2048×1536 (4:3)
WQXGA 2560×1600 (16:10)
QSXGA 2560×2048 (4:3)
WQSXGA 3200×2048 (approx. 15.6:10)
QUXGA 3200×2400 (4:3)
WQUXGA 3840×2400 (16:10)
HSXGA 5120×4096 (5:4)
WHSXGA 6400×4096 (approx. 15.6:10)
HUXGA 6400×4800 (4:3)
WHUXGA 7680×4800 (16:10)
Analogue TV Standard Resolution
PAL 720×576
PAL VHS 320×576 (approx.)
NTSC 640×482
NTSC VHS 320×482 (approx.)
Digital TV Standard Resolution
NTSC (preferred format) 648×486
D-1 NTSC 720×486
D-1 NTSC (square pixels) 720×540
PAL 720×486
D-1 PAL 720×576
D-1 PAL (square pixels) 768×576
HDTV 1920×1080
Digital Film Standard Resolution
Academy standard 2048×1536
DVD 720×480
Laserdisc 560×360

See also: computer display standards

 

 All text is available under the terms of the GNU Free Documentation License. Wikipedia is powered by MediaWiki, an open source wiki engine.

Display resolution

2006년 6월 2일 금요일

Power Management DesignLine | How you can manage multiple voltages in portables

03/23, 2005

How you can manage multiple voltages in portables
 
 
 
The proliferation of low-voltage processor, DSP and FPGA applications has created a need for digitally programmable power management control functions to meet the increasingly stringent supply rail requirements and the rapid changes placed on the power chain. Since system supply requirements change rapidly, a new "platform solution" that can change to meet any type of system power supply requirement eases the designer's job. This can be achieved by specifying a power "block" that can be standardized over a wide variety of applications and then digitally configured to individual requirements.

Typically, DC-DC converters are specified to meet ±2% initial setpoint accuracy and 3% over input voltage, loading and temperature conditions until end of life. This is insufficient for performance, testing and reliability reasons. Device voltage levels for multi-voltage Processors, DSPs and ASICs have fallen to 0.9V and are approaching 0.6V, making system voltage tolerances tighter and necessitating a new way to keep these voltage levels within specifications. If these requirements are not followed, performance degradation, fault conditions such as bus contention or device latch-up can arise. This article describes the importance of accurate DC output voltage control and a method to actively control any standard adjustable DC-DC converter module, discrete DC-DC PWM controller or LDO over time and temperature. A reference design using a standard Point-of-load (POL) DC-DC converter footprint and discrete switching regulator is shown with extremely accurate ±0.2% output levels. The POL automatically adjusts supply output voltage levels under all DC load conditions with programmable supply voltage margining allowing in-system test and control. A programmable 9-channel power supply PWM controller design is shown exhibiting ±0.5% accuracy. It forms a complete portable power system under digital control allowing dynamic adjustment of output voltage levels.

The need for accuracy and programmability As processor supply levels drop, both input current and voltage accuracy requirements increase. For this reason, systems are migrating from isolated distributed power to non-isolated distributed power architectures using POL solutions to gain improved voltage regulation and control at the load (Figure 1). Isolated distributed power uses 2 or more -48V isolated step-down DC-DC converters, which then route separate lower voltage supplies across the board. In the point of load distributed architecture, the -48V powers a single isolated DC-DC converter to provide an intermediate bus voltage. This intermediate bus voltage then powers many non-isolated DC-DC converters or LDO's at the load as shown in Figure 1.

Necessary power management functions

Figure 1 -- An example card design with power management functions necessary in data communications systems. These functions include Hot Swap, Supply Cascading/Sequencing and Tracking, Environmental Monitoring and Reset Control. As component power requirements change, the power management device can be in-system programmed using the I2C bus. The power supply is bussed from a main power bus and down converted directly at the load.

This architecture is more desirable because components making up the heart of the line card require lower voltages and higher currents and regulating at the load reduces inaccuracies. Power Management controllers are included to turn on/off and continuously monitor the POL supplies. Providing power at the load gives superior regulation, transient response and avoids voltage drops across PCB traces. This is necessary because as voltage levels decrease, allowable supply variations around these levels also decrease. Devices now not only require specific power supply turn on sequencing, but they also run at 1V or lower levels. These tighter limits demand more accurate control especially under changing load conditions and temperature variations to maintain optimal performance. The power system must automatically adjust and also test the limits of each board to guarantee performance and reliability. A highly integrated and accurate power supply manager, monitor and sequencer can achieve this required performance.

Processors are being marketed with various operating frequencies. For example, a processor with an operating frequency of 300MHz and a processor from the same manufacturer with an operating frequency of 700MHz are not fundamentally different. In fact, the 300MHz processor is not designed to run at 300MHz, it simply failed to perform to specification at 700MHz. Any processor manufacturer's data sheet will show that the higher performing processors are the result of processors yielding over a more stringent power supply rating.

The tighter power supply tolerances dictated by the high performance processor manufacturers have placed a heavy burden on the system designer. Typically, a processor's power supply tolerance is ±2.5%, which is ±25mV for a 1V supply. This power supply tolerance needs to be maintained over the full operating temperature of the board. When these challenges are compounded with board layout issues such as voltage drops across the power traces, board designers can find themselves in a desperate situation with a looming deadline.

There are several factors that affect the accuracy of a power supply. Take for example the standard structure of the non-isolated DC-DC converter shown in Figure 2. The resistor divider created by R1 and R2 sets the output voltage of the converter by feedback to the error amplifier against the reference voltage. This feedback keeps the inverting input terminal of the error amplifier and therefore the output of the supply equal to the converter's reference voltage. Inaccuracies in resistors R1 and R2 will cause errors in the set point of the converters output voltage. Variations in these resistors over temperature will increase the cumulative error. Errors in the converter's reference voltage also causes inaccuracy of the output voltage. Board layout can also decrease the accuracy of the DC-DC converter. Improper placement of the converter's voltage sense lines can result in uncompensated power trace IR losses to the load point.

Active DC Output Control
Active DC Output Control (ADOCTM) is one method of accurately controlling the output of a DC-DC converter or LDO to achieve high accuracy power supply voltages. Active DC Output Control is a new approach to intelligent power management. Using ADOC a designer can control the output of DC-DC converters or LDOs to ±0.2% for applications involving high performance processors. ADOC controls the output of a converter by effectively adjusting the resistors that set the output voltage of either a DC-DC converter or adjustable LDO. An ADOC solution is typically connected to a DC-DC converter as shown in Figure 2. The ADOC circuit stores the desired output voltage as a digital 10-bit value in non-volatile memory. The ADOC circuitry monitors the converters output at the load. After significant filtering and signal conditioning, the converter's output is compared to an inexpensive reference voltage accurate to ±0.1%. A decision is then made to increase or decrease the control signal to adjust the converter's output to the desired voltage ±0.2%.

ADOC connection

Figure 2 " The ADOC connection to a standard DC-DC converter. The ADOC function Controls DC-DC Converters via the TRIM pin. The CTRIM_CAP and RTRIM component type and values are determined for optimal operation. The RTRIM resistor is not necessary for DC-DC converter modules employing an on-board Trim Resistor.

The Output voltage in Figure 2 is derived from the following equations:
Eq1...Equation 1

Eq2...Equation 2

Where: 0.3 = TRIM output saturation voltage
Equation 3

and Vnom = Nominal non-trimmed output voltage

One problem with attempting to control the output voltage of a power supply is the possibility of interfering with the power supply's feedback control loop. Using two control loops is inherently risky and sometimes results in system instability. ADOC, however, uses a system of nonlinear, inherently convergent control to maintain system stability when coupled with the converter's control loop. The control loop of a DC-DC converter is optimized for fast transient response. On the other hand, the goal of ADOC is to accurately control the DC or average level of the output voltage. For controlling the DC voltage level the ADOC control loop runs very slow at 500Hz whereas the converters control loop responds to frequencies in the tens to hundreds of kHz. This large separation of loop response alone however does not guarantee system stability. The ADOC control loop employs a nonlinear digital control element where the adjustment to the output is always of the same magnitude. This nonlinear control induces a very small ripple voltage on the converter's output voltage. For any noise in the system with a magnitude greater than this induced ripple the gain of the ADOC control loop is less than 1. For noise of magnitude less than the induced ripple the gain is greater than 1. This noise is amplified until its magnitude is greater than the induced ripple where the loop then has a gain of less than 1. This sequence is referred to as a stable limit cycle in nonlinear systems. The induced ripple can be set with the ADOC circuit to less than 100μVp-p thus rendering it negligible.

The ADOC circuit is superior to simply using higher accuracy components such as the feedback resistors and the voltage reference for several reasons. The ADOC circuit actively controls the power supply's output so changes in temperature that affect the components of the converter result in only the ultra-low temperature variation associated with the ADOC circuit itself. Also, through the use of non-volatile memory to set the output voltage, ADOC can be used to voltage margin a converter's output accurately. This margining is a common practice among board designers to determine the robustness of a design by subjecting the board to the various voltage ranges. Some products use voltage margining as a production test to ensure system reliability. A returned board from the field is costly. Given this, companies are fearful of having marginal components on their boards. This has resulted in mandates for voltage margin testing every board that is manufactured.

The mechanism of supply margining is the same as that of supply controlling: adjust and hold the DC value of the supply. So naturally, ADOC also benefits voltage margin testing. If a mandate is set to margin test boards to ±10% with supplies that are only accurate to ±4%, the results can be unpredictable. For instance, are the supplies being margined to ±6% or are they margined to ±14%? In the 6% case the reliability test is ineffective. In the 14% case, a class of boards could be subject to yield or failure loss and the false positives result in longer debug times. Using ADOC to margin voltages in these tests increases the confidence of the test because it is well known how close the testing is to the margin limits.

The margin function can also be used for performance enhancement or to digitally control brightness by adjusting white LED backlights or contrast on an LCD as well as volume levels in an audio circuit.

The converter may be an off-the shelf compact device, or may be a "roll your own" circuit residing on the system board. In either case, the Active DC Output Control function dramatically improves voltage accuracy by implementing closed-loop active control. This utilizes the DC-DC's Trim pin as shown in Figure 2 or an equivalent output voltage feedback adjustment "VADJ" or "FB" node in a user's custom circuit.

To prove the ADOC concept, a non-isolated power supply reference design is shown in Figure 3. It is a fully functional POL DC/DC converter board used to demonstrate the improvement of using a digitally programmable nonvolatile supply voltage marginer and ADOC controller. The reference design operates from a +3.3V to +5V input and includes a synchronous PWM DC-DC converter, n-channel MOSFETs, and high current inductor. A precision voltage reference internal to the ADOC integrated circuit permits the DC-DC converter to be trimmed to within a 0.2% tolerance. The power management device controls the voltage monitoring, margining and trimming of the DC-DC PWM buck controller. Voltage margining along with many other programmable features are performed through the I2C 2-wire bus and Windows GUI interface (Figure 4). The key details of the design are the 16A Output Current with internal VREF, extremely accurate (±0.2%) control automatically adjusts supply output voltage level under all DC load conditions. A wide Margin/ADOC range from 0.3V to VDD with 2 programmable general purpose monitor sensors -- UV and OV with FAULT Output Flag, monitoring status and 256 Byte EEPROM, programmable nominal, high and low trim/margin voltages.

PoL reference design
click to enlarge
Figure 3 -- POL reference design of a digitally programmable DC-DC converter module rated to 15A at 1.5V. The design achieves a ±0.2% accurate DC-DC converter module using standard adjustable PWM controller, external FETs and ADOC function. This same design can be embedded on the system board.

GUI for PoL design

Figure 4 -- Windows GUI used to program and control the POL Reference design. All voltage levels and triggers are programmable using a Windows GUI and a PC-compatible parallel port to I2C serial bus programmer. Power management design is simplified using non-volatile programmable functions, when power is removed all settings are remembered.

Supply control using a programmable PWM controller for portable or handheld systems
To further standardization, a programmable supply voltage sequencing platform provides advantages over fixed solutions. One advantage is that a programmable solution reduces risks over changing system requirements. With a programmable solution the sequencing order can be modified and sequenced channels can be changed by simply reprogramming the controller. This minimizes the potential for having to re-spin the board when the system requirements are not clearly understood. A programmable solution also gives the designer more confidence that the board will work the first time. If a problem is encountered, reprogramming can get past the problem and onto debugging and testing the board for its intended function. On a company wide basis, the programmable solution also allows for cross platform implementation where an existing design can be reused for a unique solution by simply reprogramming.

A fully programmable power supply with integrated PWM controllers that monitors, margins, and cascade sequences provides all the power management needed in a power system. To provide a complete system, 9 voltage outputs plus voltage reference, consisting of: four synchronous PWM "buck" step-down converters, three PWM "boost" step-up converters, one PWM "boost-buck" negative DC/DC converter, and an LDO.

Typical portable power management schematic

Figure 5 -- Typical portable power management schematic using a 9-channel, programmable DC/DC controller. This integrated supply controller/manager provides power-on/off control, cascade sequencing and output margining.

The power system is capable of power-on/off cascade sequencing where each channel can be assigned to one of 8 unique sequence positions. Supplies may also be individually powered on/off through an I2C command or by assertion of one of two enable pins. Cascade sequencing, unlike time based sequencing, uses feedback to ensure that each output is within specification before the next channel is enabled.

Each output voltage and the input voltage or battery is monitored for under-voltage and over-voltage conditions. In the event of a fault, all supplies may be sequenced down or immediately disabled. Multiple output status pins are provided to notify host processors or other supervisory circuits of system faults. An Undervoltage Lockout (UVLO) circuit ensures the controller will not power up until the input or battery voltage has reached a safe operating value. The UVLO function exhibits hysteresis, ensuring that noise on the supply rail does not inadvertently cause faults or otherwise compromise the control of the output supplies.

In the event of a system fault, all monitored supplies may trigger fault actions such as power-off, or forced-shutdown operations. Each supply output may also be turned off individually at any point using the I2C command or one of two programmable enable pins.

In portable applications powered from a main system battery the battery voltage is continuously monitored for under-voltage conditions. There are two under-voltage settings for the battery; both are user programmable and have a corresponding status output pin. When the first threshold level is reached, the POWER_FAIL pin is asserted and latched. When the second threshold level is reached on the main supply, the nBATT_FAULT pin is asserted.

Voltage margin control of all output voltages through an I2C command by at least ±10% of the nominal output voltage is included. Margining creates three pre-programmed voltage settings that each channel can be set to via an I2C command. Margining is ideal when used with a channel configured as an LED driver where margining provides three brightness settings. In addition, each output is slew rate limited by digital soft-start circuitry that is user programmable and requires no external components.

All programmable settings are stored in non-volatile registers and are easily accessed and modified over an industry standard I2C serial bus. For quick prototype development Summit offers an evaluation card and a Graphical User Interface (GUI).

Cascade sequencing waveform

Margin High-Low waveform

Figure 6 - Power-on Cascade sequencing and Margin High/Low Waveforms. The supply channels are cascade sequenced-on to nominal voltage, margined high or low and then cascade sequenced-off. Channels 1, 2, 3, 4 are first margined high and then channels 2 and 3 are margined low. Up to 8 PWM supplies are controlled. (Ch 1 (500mV/D) = 1.25V Buck (Yellow trace), Ch 2 (500mV/D) = 2.5V Buck (Blue trace), Ch 3 (2V/D) = -7.5V Inverting Buck-Boost (Purple trace), Ch 4 (2V/D) = 12V Boost (Purple trace))

Conclusion
New digitally programmable power supply controller provide I2C programmable output voltages, Power on and off sequencing, Individual channel enable control, Battery monitoring, UV and OV monitoring on PWM outputs, Margining and Slew rate control. Actively controlling DC output voltage levels to within ±0.2% under light or full load to meet stringent tolerance requirements of high performance components further extends reliable operation and margining supplies tests system performance goals as well as providing an easy way to adjust brightness and volume control. The integration of active accuracy control, programmable features and built-in flexibility allows the system designer to create a "platform solution" that can be easily modified via software without major hardware changes. Combined with re-programmability, this facilitates rapid design cycles and the proliferation from a base design to future generations of product.

About the Authors:
Tom DeLurio is director of applications engineering at Summit Microelectronics. He is responsible for supporting customer implementation of Summit devices, evaluation kit production and new product definition. Before joining Summit, Mr. DeLurio held applications engineering management positions at Impala Linear Corporation. He has also held positions at Micro Linear Corporation, Aspen/Cypress Semiconductor, NCR Corporation's ASIC division, Honeywell, and Signetics Corporation. Mr. DeLurio has authored numerous articles for industry publications. He holds a BSEE degree from Pennsylvania State University. tom_delurio@summitmicro.com

George Hall is Staff Applications Engineer at Summit Microelectronics. He is responsible for supporting customers using Summit devices, evaluation kit design and new product definition. Before joining Summit, Mr. Hall was an applications engineering at Monolithic Power Systems. He has also held positions at Micro Linear Corporation, Micrel Semiconductor, Raynet, Computer Products, and General Electric. Mr. Hall has authored numerous application notes and holds a patent in phase-locking switched-mode power supplies. ghall@summitmicro.com